Manufacturing method of semiconductor device

ABSTRACT

A semiconductor device ensuring an isolation of elements by a trench is provided. A method of manufacturing the semiconductor device includes the step of forming a silicon nitride film having an aperture, the step of selectively removing a part of a silicon substrate along aperture to form a recess defined by a side surface and a bottom surface in silicon substrate, the step of oxidizing the side surface and the bottom surface of the recess to form a thermal oxide film having a side portion and a bottom portion, and the step of selectively removing bottom portion of thermal oxide film and a part of silicon substrate by using silicon nitride film as a mask to form a trench.

BACKGROUND OF THE INVENTION

[0001] Field of the Invention

[0002] The present invention relates to a semiconductor device and amanufacturing method thereof. More particularly, the present inventionrelates to a semiconductor device having a trench for isolation ofelements and a manufacturing method thereof.

[0003] In a conventional semiconductor device, it is known to use atrench isolation to isolate semiconductor elements formed on asemiconductor substrate. FIGS. 16-21 are cross-sectional views showingconventional method of manufacturing a semiconductor device. Referringto FIG. 16, a thermal oxide film 2 of about 20 nm in thickness is formedon a surface represented by (001) plane of a silicon substrate 1. Then,a silicon nitride film 3 of about 200 nm in thickness is formed onthermal oxide film 2. A resist is applied on silicon nitride film 3, anda resist pattern 4 is formed by patterning the resist byphotolithography. Silicon nitride film 3 and thermal oxide film 2 aredry-etched by using resist pattern 4 as a mask. A part of siliconsubstrate 1 is also etched in this step to form a recess 1 h.

[0004] Referring to FIG. 17, after removing resist pattern 4, siliconsubstrate 1 is dry-etched by using patterned silicon nitride film 3 andthermal oxide film 2 as a mask. This forms a trench 7 of about 300 nm indepth.

[0005] Referring to FIG. 18, plasma is used to form trench 7 by etching.A surface of the trench is thermally oxidized for the purpose ofremoving a layer damaged by plasma and of making a corner portion 7 c oftrench 7 rounded to avoid an electric field concentration at cornerportion 7 c. This forms a thermal oxide film 5 of about 30 nm inthickness.

[0006] Referring to FIG. 19, silicon oxide film 9 of about 500 nm inthickness is formed. This silicon oxide film 9 fills trench 7.

[0007] Referring to FIG. 20, silicon oxide film 9 is removed to exposesilicon nitride film 3. Silicon oxide film 9 is removed by a method suchas a chemical mechanical polishing (CMP) or an etch back.

[0008] Referring to FIG. 21, after silicon oxide film 9 is wet-etched toa prescribed amount by hydrofluoric acid, silicon nitride film 3 isremoved by hot phosphoric acid. This forms a shallow trench isolation(STI) 10. Thereafter, an n-type well, a p-type well, a gate oxide film,a gate electrode, a source-drain region, etc. are formed to make anelement such as a transistor.

[0009] A problem caused by the conventional manufacturing method will bedescribed below. FIG. 22 is a cross-sectional view showing a problemcaused by the conventional manufacturing process. Referring to FIG. 22,thicker thermal oxide film 5 formed by thermal oxidation is morepreferable to further round corner portion 7 c of trench 7. Therefore,it is conceivable to thicken thermal oxide film 5 (to 60 nm, forexample) by increasing an amount of thermal oxidation, as shown in FIG.22. However, as the amount of thermal oxide film 5 is increased, anaperture width W2 of trench 7 seen from a surface side of siliconsubstrate 1 will become smaller than an aperture width W1 of trench 7shown in FIG. 18. This would make the step of filling trench 7 withsilicon oxide film 9 more difficult, and the filling efficiency will bedecreased. Therefore, the isolation of elements cannot be ensured and areliability of the semiconductor device will be decreased.

SUMMARY OF THE INVENTION

[0010] An object of the present invention is to solve theabove-mentioned problem and to provide a highly reliable semiconductordevice.

[0011] A method of manufacturing a semiconductor device according to thepresent invention includes the step of forming a mask layer having afirst aperture on a main surface of a semiconductor substrate includingsilicon, the step of selectively removing a part of the semiconductorsubstrate along the first aperture by using the mask layer as a mask toform a recess defined by a side surface and a bottom surface in thesemiconductor substrate, the step of oxidizing the side surface and thebottom surface of the recess to form a first silicon oxide film having aside portion and a bottom portion, the step of selectively removing thebottom portion of the first silicon oxide film and a part of thesemiconductor substrate by using the mask layer as a mask to form atrench, and the step of oxidizing a surface of the trench.

[0012] According to the method of manufacturing a semiconductor deviceincluding such steps, a trench is formed after the side surface and thebottom surface of the recess are oxidized to form a silicon oxide filmhaving a side portion and a bottom portion, and then a surface of thetrench is oxidized. Therefore, the side portion of the recess isoxidized in two steps, that is, the step of forming the first siliconoxide film and the following step of oxidizing a surface of the trench,while the most part of the trench surface is oxidized once. With this, acorner portion of the trench will be oxidized in a larger amount becausethe portion is oxidized twice. This can avoid an electric fieldconcentration at the corner portion of the trench. Furthermore, as theother portions of the trench surface are oxidized only once, an aperturediameter of the trench will not be too small. As a result, filling ofthe trench with insulating film in the following step will be easier, sothat a highly reliable semiconductor device can be provided.

[0013] Preferably, the method of manufacturing a semiconductor devicefurther includes the step of forming a second silicon oxide film on amain surface of the semiconductor substrate prior to the step of formingthe mask layer. The step of forming the recess includes the step ofremoving a part of the second silicon oxide film to form a secondaperture continuing from the first aperture in the second silicon oxidefilm, and the step of removing a part of the semiconductor substrate toform the recess continuing from the second aperture. Since the siliconoxide film is formed between the mask layer and the semiconductorsubstrate, the mask layer can be prevented from applying stress or thelike to the semiconductor substrate. Preferably, the step of forming thefirst silicon oxide film includes the step of forming the first siliconoxide film such that it continues from the portion of the second siliconoxide film that defines the second aperture. Preferably, the method ofmanufacturing a semiconductor device further includes the step offorming a polysilicon layer between the second silicon oxide film andthe mask layer. The step of forming the recess includes the step ofremoving a part of the polysilicon layer to form a third aperturecontinuing from the first aperture in the polysilicon layer and the stepof forming a second aperture and the recess continuing from the thirdaperture. The step of forming the first silicon oxide film includes thestep of oxidizing the portion of the polysilicon layer that defines thethird aperture to form the first silicon oxide film. This can thickenthe silicon oxide film because the polysilicon layer is also oxidized toform the first silicon oxide film. Therefore, the electric fieldconcentration at corner portion of the trench can further be mitigated.Preferably, the step of forming the polysilicon layer includes the stepof forming a belt-shaped conductive layer to be a floating gateelectrode. The method further includes the step of patterning thebelt-shaped conductive layer to form a floating gate electrode afterforming the trench. Since a side wall portion of the belt-shapedconductive layer is oxidized, the silicon oxide film at this portionwill become thicker. Then, when the belt-shaped conductive layer ispatterned to form the floating gate electrode, a silicon oxide filmextending from the floating gate electrode to the trench is formed. As aresult, the corner portion of the trench can be rounded, and anon-volatile semiconductor memory device which can mitigate the electricfield concentration can be provided. Preferably, the step of forming thetrench includes the step of removing the bottom portion and leaving theside portion of the first silicon oxide film. Since the side portion ofthe first silicon oxide film remains, the silicon oxide film at thisportion will become thicker and the electric field concentration at thecorner portion of the trench can be mitigated.

[0014] The foregoing and other objects, features, aspects and advantagesof the present invention will become more apparent from the followingdetailed description of the present invention when taken in conjunctionwith the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIGS. 1 to 8 are cross-sectional views showing first to eighthsteps of a method of manufacturing a semiconductor device according to afirst embodiment of the present invention.

[0016] FIGS. 9 to 14 are cross-sectional views showing first to sixthsteps of a method of manufacturing a semiconductor device according to asecond embodiment of the present invention.

[0017]FIG. 15 is a cross-sectional view of a non-volatile semiconductormemory device according to a third embodiment of the present invention.

[0018] FIGS. 16 to 21 are cross-sectional views showing first to sixthsteps of a conventional method of manufacturing a semiconductor device.

[0019]FIG. 22 is a cross-sectional view showing a problem caused by aconventional manufacturing process.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Embodiments of the present invention will now be described withreference to the drawings.

First Embodiment

[0021] Referring to FIG. 1, a thermal oxide film 102 as a second siliconoxide film of about 20 nm in thickness is formed on a surface of asilicon substrate 101. A silicon nitride film 103 of about 200 nm inthickness is formed on thermal oxide film 102. A resist is applied onsilicon nitride film 103, and a resist pattern 104 is formed bypatterning the resist. Silicon nitride film 103, thermal oxide film 102and silicon substrate 101 are dry-etched by using resist pattern 104 asa mask. This forms an aperture 103 h as a first aperture in siliconnitride film 103 as a mask layer. An aperture 102 h as a second aperturecontinuing from the first aperture is formed in thermal oxide film 102.A recess 101 h having a side surface 101 s and a bottom surface 101 b,which is continuing from the first and second apertures, is formed insilicon substrate 101.

[0022] Referring to FIG. 2, resist pattern 104 is removed. Then, athermal oxide film 105 as a first silicon oxide film of about 30 nm inthickness is formed by thermal oxidation. Thermal oxide film 105 iscontinuing from the portion of thermal oxide film 102 that definesaperture 102 h, and has a side portion 105 s formed by oxidation of sidesurface 101 s and a bottom portion 105 b formed by oxidation of bottomsurface 101 b.

[0023] Referring to FIG. 3, thermal oxide film 105 is dry-etched byusing patterned silicon nitride film 103 and thermal oxide film 102 as amask. This removes bottom portion 105 b and leaves side portion 105 s ofthermal oxide film 105. In a thickness H1 of the portion of remainingside portion 105 s, the silicon oxide film is thicker than thermal oxidefilm 102, and this side portion 105 s exists as a bird's beak.

[0024] Referring to FIG. 4, a trench 107 of about 300 nm in depth isformed by dry-etching (plasma etching) silicon substrate 101 to remove apart of silicon substrate 101 along aperture 103 h.

[0025] Referring to FIG. 5, a surface of trench 107 is thermallyoxidized for the purpose of removing a layer damaged by plasma etchingfor forming trench 107 and of making a corner portion 107 c of trench107 rounded to avoid an electric field concentration at corner portion107 c. This forms a thermal oxide film 115 of about 30 nm in thickness.Together with the step shown in FIG. 2, a thermal oxide film of about 60nm in thickness is formed at corner portion 107 c. An aperture width W1of trench 107 seen from a main surface 101 f of silicon substrate 101will become larger than an aperture width W2 shown in FIG. 22.

[0026] Referring to FIG. 6, trench 107 is filled with a silicon oxidefilm 109. Since trench 107 has an aperture width W1 larger than anaperture width W2 of the trench in FIG. 22, filling of trench 107 withsilicon oxide film 109 becomes easier. Silicon oxide film 109 has athickness of about 500 nm.

[0027] Referring to FIG. 7, silicon oxide film 109 is removed to exposea surface of silicon nitride film 103. It is removed by a method such asa CMP or an etch back.

[0028] Referring to FIG. 8, silicon oxide film 109 is wet-etched to aprescribed amount by hydrofluoric acid. Then, silicon nitride film 103is removed by hot phosphoric acid. With this, a shallow trench isolation110 is completed.

[0029] In the method of manufacturing a semiconductor device accordingto the present invention as described above, corner portion 107 c oftrench 107 is oxidized twice in steps shown in FIGS. 2 and 5. Therefore,corner portion 107 c can be rounded sufficient to mitigate the electricfield concentration at this portion. Furthermore, the other portions ofthe surface of trench 107 are oxidized only once. As a result, since thewidth of trench 107 will not become smaller, the filling of trench 107with silicon oxide film 109 will become easier.

Second Embodiment

[0030] Referring to FIG. 9, thermal oxide film 102 is formed on mainsurface 101 f of silicon substrate 101. A doped polysilicon film 111 asa polysilicon layer is formed on thermal oxide film 102. Silicon nitridefilm 103 and resist pattern 104 are formed on doped polysilicon film111. Then, silicon nitride film 103, doped polysilicon film 111, thermaloxide film 102, and silicon substrate 101 are etched by using resistpattern 104 as a mask. This forms an aperture 111 h as a third aperturein doped polysilicon film 111 in addition to apertures 103 h and 102 hand recess 101 h similar to that of the first embodiment.

[0031] Referring to FIG. 10, after removing resist pattern 104, sidesurface 101 s and bottom surface 101 b of recess 111 h and the portionof doped polysilicon film 111 that defines aperture 111 h are thermallyoxidized. This forms thermal oxide film 105 as a first silicon oxidefilm. Thermal oxide film 105 has side portion 105 s formed by oxidationof side surface 101 s and doped polysilicon film 111, and bottom portion105 b formed by oxidation of bottom surface 101 b.

[0032] Referring to FIG. 11, thermal oxide film 105 is etched alongaperture 103 h. This removes bottom portion 105 b and leaves sideportion 105 s of thermal oxide film 105. It should be noted that, aheight H2 of side portion 105 s is larger than a height H1 shown in FIG.3 of the first embodiment.

[0033] Referring to FIG. 12, silicon substrate 101 is then etched alongaperture 103 h by using silicon nitride film 103 as a mask. This formstrench 107.

[0034] Referring to FIG. 13, a surface of trench 107 is thermallyoxidized. This forms thermal oxide film 115. Since corner portion 107 cof trench 107 is also oxidized, the thermal oxide film will becomeespecially thick at this portion. In contrast, the portions other thancorner portion 107 c are thermally oxidized only once.

[0035] Referring to FIG. 14, trench 107 is filled with silicon oxidefilm 109 in accordance with the step similar to that of the firstembodiment. Then, silicon nitride film 103 is removed to completeshallow trench isolation 110.

[0036] Such semiconductor device has an effect similar to that of thesemiconductor device according to the first embodiment. Furthermore, asthe portion of doped polysilicon film 111 that defines aperture 111 h isalso oxidized, the thermal oxide film will become especially thick atcorner portion 107 c of trench 107. As a result, the electric fieldconcentration at corner portion 107 c of trench 107 can be mitigatedmore than in the first embodiment.

Third Embodiment

[0037] In a third embodiment, a non-volatile semiconductor memory deviceis manufactured as a semiconductor device. Firstly, a belt-shapedconductive film is used as doped polysilicon film 111 shown in FIG. 14.A dielectric film consisting of a silicon oxide film, a silicon nitridefilm and a silicon oxide film, and a polysilicon film are formed on thisbelt-shaped conductive film.

[0038] A resist pattern having a pattern of a control gate electrode isformed on the polysilicon film, and the polysilicon film, the dielectricfilm and the belt-shaped conductive film are etched in accordance withthe resist pattern. This results in a non-volatile semiconductor memorydevice including a floating gate electrode 151, a dielectric film 152and a control gate electrode 153 as shown in FIG. 15. Floating gateelectrode 151 is obtained by etching of doped polysilicon film 111 as abelt-shaped conductive film.

[0039] The semiconductor device of the present invention, manufacturedthrough the method including such steps, has an effect similar to thatof the semiconductor device in accordance with the second embodiment.Furthermore, as the step of forming the belt-shaped conductive film tobe the floating gate electrode can be followed immediately by theetching step of forming trench 107, the non-volatile semiconductormemory device can be provided without increasing the number ofmanufacturing steps.

[0040] Though embodiments of the present invention have been described,the embodiments shown can be modified to various forms. Thesemiconductor device having such shallow trench isolation can be used ina region isolating memory elements such as that of a dynamic randomaccess memory (DRAM) or a static random access memory (SRAM).Furthermore, it can also be used for an element isolation in a logicregion.

[0041] A semiconductor device ensuring an isolation of elements by atrench can be provided according to the present invention.

[0042] Although the present invention has been described and illustratedin detail, it is clearly understood that the same is by way ofillustration and example only and is not to be taken by way oflimitation, the spirit and scope of the present invention being limitedonly by the terms of the appended claims.

What is claimed is:
 1. A method of manufacturing a semiconductor device,comprising the steps of: forming a mask layer having a first aperture ona main surface of a semiconductor substrate including silicon;selectively removing a part of said semiconductor substrate along saidfirst aperture by using said mask layer as a mask to form a recessdefined by a side surface and a bottom surface in said semiconductorsubstrate; oxidizing the side surface and the bottom surface of saidrecess to form a first silicon oxide film having a side portion and abottom portion; selectively removing the bottom portion of said firstsilicon oxide film and a part of said semiconductor substrate by usingsaid mask layer as a mask to form a trench; and oxidizing a surface ofsaid trench.
 2. The method according to claim 1, further comprising thestep of forming a second silicon oxide film on a main surface of saidsemiconductor substrate prior to the step of forming said mask layer,wherein the step of forming said recess includes the step of removing apart of said second silicon oxide film to form a second aperturecontinuing from said first aperture in said second silicon oxide filmand the step of removing a part of said semiconductor substrate to formsaid recess continuing from said second aperture.
 3. The methodaccording to claim 2, wherein the step of forming a first silicon oxidefilm includes the step of forming said first silicon oxide film suchthat it continues from the portion of said second silicon oxide filmthat defines said second aperture.
 4. The method according to claim 2,further comprising the step of forming a polysilicon layer between saidsecond silicon oxide film and said mask layer, wherein the step offorming said recess includes the step of removing a part of saidpolysilicon layer to form a third aperture continuing from said firstaperture in said polysilicon layer and the step of forming a secondaperture and said recess continuing from said third aperture, andwherein the step of forming said first silicon oxide film includes thestep of oxidizing the portion of said polysilicon layer that definessaid third aperture to form said first silicon oxide film.
 5. The methodaccording to claim 4, wherein the step of forming said polysilicon layerincludes the step of forming a belt-shaped conductive layer to be afloating gate electrode, said method further comprising the step ofpatterning said belt-shaped conductive layer to form a floating gateelectrode after forming said trench.
 6. The method according to claim 1,wherein the step of forming said trench includes the step of removingthe bottom portion and leaving the side portion of said first siliconoxide film.
 7. The method according to claim 1, wherein the step offorming said mask layer includes the step of forming said mask layerincluding a silicon nitride film.